Design Verification Engineer Senior

Salary: $108000 - 169000 per year Requirements: Minimum 8 years of relevant experience with a 4-year degree, or 6 years with an advanced degree, or equivalent expertise In-depth knowledge and experience in verification environments for ASIC SoCs Proficiency in C/C++ for test development and debugging Ability to create complex self-checking test benches with random stimulus generation Familiarity with formal verification processes and best practices Experience in developing and modifying automation scripts Capability to plan, analyze, and review functional and technical specifications Strong problem-solving skills, particularly for complex issues Experience in mentoring or training junior staff Responsibilities: Design and implement the verification environment for ASIC SoCs, overseeing the verification process from planning to tape-out Develop complex self-checking test benches utilizing constrained random stimuli Architect and document test frameworks for the ASIC features Conduct debugging and development of test firmware for SoC ASIC platforms Collaborate with teams on methodology development and project specifications Establish and maintain a comprehensive end-to-end formal verification process Create or adjust scripts aimed at automating the verification workflow Develop the verification environment, including assumptions, assertions, and coverage properties Technologies: Architect Firmware Flow Support LESS More: We are a technology-driven company located in San Jose, California, dedicated to providing innovative solutions in engineering services. Our team values collaboration, creativity, and a commitment to excellence. In joining us, you will benefit from a competitive salary range of $112,200.00 - $176,000.00, commensurate with experience and skills. We are an equal opportunity employer, welcoming applicants from diverse backgrounds and perspectives. last updated 28 week of 2026