Logic Design Engineer (FPGA)

We're looking for Logic Design Engineer to join our client's project
Requirements:
B.Sc. in Electrical Engineering, Computer Engineering, or equivalent background. At least 4 years of professional experience. Proven experience in RTL design using SystemVerilog. Strong knowledge of digital logic design and FPGA development. Experience with tools such as Vivado and VCS is an advantage
Must have: FPGA
Daily tasks: - Perform the full range of functional verification activities.
– Develop verification environments from scratch, including drivers, monitors, scoreboards, and coverage models.
– Integrate Verification IPs (VIPs) for protocols such as DDR, PCIe, and AXI.
– Define and implement verification sequences for complex control-flow scenarios.
– Gain a system-level understanding of products with strong hardware-software interaction.
– Integrate and maintain reference models.
– Define and execute test plans.
– Establish verification methodologies, flows, and supporting infrastructure.