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Front-End Design Engineer
Solstice Analytics · San Diego, California, USA · Posted 20d ago
About the role
Responsible for RTL design and verification of digital IPs used in Qualcomm chips.
Company: Solstice Analytics, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: In this position, you will be responsible for RTL design and verification of digital IPs used across the board in Qualcomm chips. You will have the opportunity to work on critical high-speed clock IPs, power-sequencing blocks integral to Qualcomm's low power designs, custom FIFOs and high-speed latch arrays. The position also involves close collaboration with SOC design and
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FAQ
Is the Front-End Design Engineer role at Solstice Analytics remote?+
This Front-End Design Engineer position is listed as onsite (San Diego, California, USA).
What is the salary for the Front-End Design Engineer role at Solstice Analytics?+
The listing states USD 115,600.00 - 173,400.00 per year.
What seniority level is this Front-End Design Engineer role?+
This is a unknown level position.
How do I apply for the Front-End Design Engineer role at Solstice Analytics?+
Use the "Apply on dice" button to open the original posting on dice, where you can submit your application directly to Solstice Analytics.